1. Field of the Invention
The present invention relates to an amplifier semiconductor element for linear amplification, a method for fabricating such an amplifier semiconductor element, and an amplifier semiconductor device. More particularly, the present invention relates to an amplifier semiconductor element which is fabricated by an ion implantation process, a method for fabricating such an amplifier semiconductor element, and an amplifier semiconductor device.
2. Description of the Related Art
In digital communication, in order to extend the communication duration allowed for a portable terminal such as a cellular phone, a high-efficiency linear amplifier is required. One example of such a linear amplifier is an amplifier semiconductor device.
The quality of communication depends on an adjacent channel leakage power. When the adjacent channel leakage power of an amplifier semiconductor device exceeds a specified value, the amplifier semiconductor device cannot be utilized for communication even if the efficiency thereof is high.
FIG. 19 is a graph for explaining the physical effect of the adjacent channel leakage power. The adjacent channel leakage power is a parameter for evaluating the leakage of a modulated wave signal beyond its band when the signal is amplified. When the adjacent channel leakage power exceeds a specified value, it blocks the communication at an adjacent channel. In order to realize high-quality communication without the blocking of the communication at an adjacent channel, the adjacent channel leakage power needs to be below the specified value.
Conventionally, a high electron mobility transistor (HEMT) and a metal semiconductor field effect transistor (MESFET) suitable for radio-frequency (RF) operation are used for the amplifier semiconductor device.
With the increasing demand for smaller and lighter portable terminals, smaller batteries have been developed to meet the demand for such portable terminals. To meet the demand for smaller batteries, the operating voltage (drain voltage) of the amplifier semiconductor device needs to be made low.
In order to enhance the performance of an amplifier semiconductor element used for the amplifier semiconductor device, the amount of parasitic components of the amplifier semiconductor element which may degrade the electric characteristics thereof must be decreased.
In the amplifier semiconductor element, an n-layer (hereinbelow, also referred to as an "operation layer") is made shallow to suppress a short channel effect which may affect the withstand voltage characteristics and in consideration of the current shut-off characteristics of the operation layer by use of a gate bias. On the other hand, no established technique for forming a shallow n.sup.+ -layer exists at present because doping becomes less controllable as the doping is nearer to the surface. For these reasons, in the amplifier semiconductor element, the n-layer is generally made shallower than the n.sup.+ -layer.
In order to apply a field effect transistor (FET) to a high-output amplifier semiconductor element, the withstand voltage between a gate electrode and a drain electrode must be high. The withstand voltage can be made high by securing a sufficiently large distance between the gate electrode and the drain electrode. However, if the distance between the gate electrode and the drain electrode is excessively large, a parasitic resistance increases, thereby degrading the electric characteristics. A method for increasing the withstand voltage between the gate electrode and the drain electrode without providing a large distance between the gate electrode and the drain electrode is described in Japanese Laid-Open Publication No. 3-233942. According to this method, a step is formed in an operation layer, and a source electrode and a gate electrode are formed on an upper portion of the operation layer with respect to the step, while a drain electrode is formed on a lower portion thereof. A method where a portion of an operation layer located between a gate electrode and a drain electrode is provided with a high resistance is also known.
The conventional amplifier semiconductor element has disadvantages as follows. As the operating voltage (drain voltage) of the amplifier semiconductor element becomes low due to a reduced power supply voltage, the absolute of a threshold voltage or a pinch-off voltage reduces. For example, according to "WNx/W self-aligned gate GaAs MESFET for 1.9 GHz band power amplification operable at low voltage and single power supply", 1993 Electronic Information Communication Society Autumn Convention C-376, the threshold voltage is &gt;-1 V (i.e., the absolute is less than 1 V) for the operating voltage of 2.7 V.
The "pinch-off voltage" means a gate bias V.sub.g applied when a minute source-drain current flows. The value of the pinch-off voltage is substantially the same as the value of threshold voltage V.sub.th depending on the setting of the source-drain current. Under ion implantation conditions causing a large leakage current, the shut-off of the source-drain current is not possible even if a gate voltage is applied. Under such conditions, therefore, an appropriate value for the pinch-off voltage cannot be obtained.
In order to provide a low-cost amplifier semiconductor element, using an ion implantation process is more desirable than using an expensive epitaxial wafer. Using the ion implantation process, however, makes it difficult to obtain a high-efficiency amplifier semiconductor element. For example, as reported in the above-mentioned "WNx/W self-aligned gate GaAs MESFET for 1.9 GHz band power amplification operable at low voltage and single power supply", 1993 Electronic Information Communication Society Autumn Convention C-376, it is extremely difficult to obtain a high-efficiency amplifier semiconductor element with an efficiency of more than 30% for the drain voltage of 1 V or more than 50% for the drain voltage of 3 V.
In order to meet the reduction of the power source voltage, various attempts have been made to improve the low-voltage operation of an amplifier semiconductor element. The operation conditions for an amplifier semiconductor element which requires linear operation are determined one-sidedly based on the specified value of the adjacent channel leakage power. This causes a problem in that increasing only the efficiency of a FET does not contribute to reducing the adjacent channel leakage power below the specified value.
The adjacent channel leakage power is considered to be generated when an amplified signal is distorted beyond a linear region. No device parameter having a direct relationship with the magnitude of the adjacent channel leakage power has been specified at present.
For example, IEICE Trans. Electron., Vol. E78C, No. 9, pp. 1241-1245, September 1995 describes that the flatter the dependency of the transconductance gm on the gate bias V.sub.g is, the better the linearity is. However, the transconductance gm of an actual amplifier semiconductor element at an operation point is not necessarily flat. It is therefore unknown whether or not the linearity actually becomes better as the dependency of the transconductance gm on the gate bias V.sub.g is flatter.
Forming a step in the operation layer of the FET for higher withstand voltage of the amplifier semiconductor element as described above makes the fabrication process of the amplifier semiconductor element complicated. Also, providing a high-resistance portion in the operation layer of the FET as described above causes a problem in the stability at the fabrication of the amplifier semiconductor element.